Semiconductor device and manufacturing method thereof

ABSTRACT

[Summary] 
     [Problem] 
     A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. [Solving Means] 
     By performing the formation of the pixel electrode  127,  the source region  123  and the drain region  124  by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.

DETAILED DESCRIPTION OF THE INVENTION

[0001] [Technical Field to which the Invention Belongs]

[0002] The present invention relates to a semiconductor device having acircuit comprising a thin film transistor (hereafter referred to asTFT), and to a method of manufacturing thereof. For example, the presentinvention relates to an electro-optical device, typically a liquidcrystal display panel, and to electronic equipment loaded with this typeof electro-optical device as a part.

[0003] Note that, throughout this specification, semiconductor devicedenotes a general device which can function by utilizing semiconductorcharacteristics and that the category of semiconductor devices includeselectro-optical devices, semiconductor circuits, and electronicequipment.

[0004] In recent years, techniques of structuring a thin film transistor(TFT) by using a semiconductor thin film (with a thickness on the orderof several nm to several hundred of nm) formed over a substrate havingan insulating surface have been in the spotlight. The thin filmtransistor is being widely applied in an electronic device such as an ICor an electro-optical device, and in particular, its development as aswitching element of an image display device has been proceedingrapidly.

[0005] Conventionally, a liquid crystal display device is known as animage display device. Active matrix liquid crystal display devices havecome into widespread due to the fact that, compared to passive liquidcrystal display devices, a higher precision image can be obtained. Bydriving pixel electrodes arranged in a matrix state in the active matrixliquid crystal display device, a display pattern is formed on a screenin an active matrix liquid crystal display device. In more detail, byapplying a voltage between a selected pixel electrode and an opposingelectrode corresponding to the pixel electrode, optical modulation of aliquid crystal layer arranged between the pixel electrode and theopposing electrode is performed, and the optical modulation isrecognized as a display pattern by an observer.

[0006] The use of this type of active matrix liquid crystal displaydevice is spreading, and along with making the screen size larger,demands for higher precision, higher aperture ratio, and higherreliability are increasing. Further, at the same time, demands areincreasing for improving productivity and lowering costs.

[0007] Conventionally, an amorphous silicon film is ideally used as anamorphous semiconductor film because of the capability of forming it ona large surface area substrate at a low temperature equal to or lessthan 300° C. Further, a reversed stagger type (or bottom gate type) TFThaving a channel forming region formed by an amorphous semiconductorfilm is often used.

[0008] [Problem to be Solved by the Invention]

[0009] Conventionally, the production costs have been high in order tomanufacture a TFT on a substrate with a technique of photolithographyusing at least 5 photomasks for an active matrix type liquid crystaldisplay device. In order to improve productivity and yield, reducing thenumber of steps is considered as an effective means.

[0010] Specifically, it is necessary to reduce the number of photomasksneeded to manufacture the TFT. The photomask is used in aphotolithography technique in order to form a photoresist pattern, whichbecomes an etching process mask, over the substrate.

[0011] By using one photomask, there are applied with steps such asapplying resist, pre-baking, exposure, development, and post-baking, andin addition, steps of film deposition and etching, resist peeling,cleaning, and drying are added before and after these steps. Therefore,the entire process becomes complex, which leads to a problem.

[0012] Further, static electricity is generated by causes such asfriction during manufacturing steps because the substrate is aninsulator. Short circuits develop at an intersection portion of wiringsformed on the substrate when static electricity is generated, and thendeterioration or breakage of the TFT due to static electricity leads todisplay faults or deterioration of image quality in liquid crystaldisplay devices. In particular, static electricity develops duringrubbing in the liquid crystal aligning process performed in themanufacturing steps, and this becomes a problem.

[0013] The present invention is for solving such problems, and an objectof the present invention is to reduce the number of steps formanufacturing a TFT, and to realize a reduction in the production costand an improvement in yield for a semiconductor device typified by anactive matrix type liquid crystal display device.

[0014] Further, an object of the present invention is to provide astructure and a method of manufacturing the structure for resolving theproblems of damage to the TFT and deterioration of TFT characteristicsdue to static electricity.

[0015] [Means for Solving the Problem]

[0016] In order to solve the above problems, in the present invention,first, a gate wiring line is formed by a first photomask.

[0017] Next, a gate insulating film, a non-doped amorphous silicon film(hereinafter referred to as a-Si film), an amorphous silicon filmcontaining an impurity element to give an n-type conductivity(hereinafter referred to as n⁺a-Si film), and a conductive film arecontinuously formed.

[0018] Next, a gate insulating film, an active layer comprising the a-Sifilm, a source wiring line (including a source electrode), and a drainelectrode are formed through patterning by a second photomask.

[0019] Thereafter, after a transparent conductive film is formed, apixel electrode made of the transparent conductive film is formed by athird photomask, and further, at the same time that a source region anda drain region comprising the n⁺a-Si film are formed, a part of the a-Sifilm is removed.

[0020] By adopting such structure, the number of photomasks used in aphotolithography technique can be made three.

[0021] Further, the source wiring is covered by a transparent conductivefilm comprising the same material as the pixel electrode, a structurewhich protects the entire substrate from eternal static electricity orthe like is used. Furthermore, a structure in which a protecting circuitis formed using the transparent conductive film may also be used. Thegeneration of static electricity due to friction between productionequipment and the insulating substrate can be prevented duringmanufacturing processing by using this type of structure. In particular,the TFTs can be protected from static electricity generated during aliquid crystal alignment process of rubbing performed duringmanufacturing steps.

[0022] A structure of the present invention disclosed in thisspecification is:

[0023] a semiconductor device possessing a gate wiring, a source wiring,and a pixel electrode, having:

[0024] the gate wiring 102 formed on an insulating surface;

[0025] the insulating film 110 formed on the gate wiring;

[0026] the amorphous semiconductor film 122 formed on the insulatingfilm;

[0027] the source region 123 and the drain region 124 formed on theamorphous semiconductor film;

[0028] the source wiring 125 or the electrode 126 formed on the sourceregion or the drain region; and

[0029] the pixel electrode 127 formed on the electrode;

[0030] characterized in that:

[0031] one end surface of the drain region 124 or the source region 123reversed corresponds with an end surface of the insulating film 110, anend of the amorphous semiconductor film 122 and an end surface of theelectrode 126.

[0032] Further, another structure of the present invention is:

[0033] a semiconductor device possessing a gate wiring, a source wiring,and a pixel electrode, having:

[0034] the gate wiring 102 formed on an insulating surface;

[0035] the insulating film 110 formed on the gate wiring;

[0036] the amorphous semiconductor film 122 formed on the insulatingfilm;

[0037] the source region 123 and the drain region 124 formed on theamorphous semiconductor film;

[0038] the source wiring 125 or the electrode 126 formed on the sourceregion or the drain region; and

[0039] the pixel electrode 127 formed on the electrode;

[0040] characterized in that:

[0041] one end surface of the drain region 124 or the source region 123reversed corresponds with an end surface of the insulating film 110, anend surface of the amorphous semiconductor film 122 and an end surfaceof the electrode 126; and

[0042] the other end surface of the drain region 124 or the sourceregion 123 reversed corresponds with an end surface of the pixelelectrode 127 and the other end surface of the electrode 126.

[0043] Further, each of the above structures is characterized in thatthe source region and the drain region comprises an amorphoussemiconductor film containing an impurity element which imparts n-typeconductivity.

[0044] Still further, each of the above structures is characterized inthat the insulating film, the amorphous semiconductor film, the sourceregion, and the drain region are formed in succession without exposureto the atmosphere.

[0045] In addition, each of the above structures is characterized inthat the insulating film, the amorphous semiconductor film, the sourceregion, or the drain region is formed by a sputtering method.

[0046] Additionally, each of the above structures is, as shown in FIG.2(D), characterized in that the source region 123 and the drain region124 are formed by using the same mask as that of the amorphoussemiconductor film 122 and the electrode 126. Moreover, it ischaracterized in that the source region and the drain region are formedby using the same mask as that of the source wiring 125.

[0047] Further, each of the above structures is, as shown in FIG. 2(D),characterized in that the source region 123 and the drain region 124 areformed by using the same mask as that of the source wiring 125 and thepixel electrode 127.

[0048] In addition, in each of the above structures, by etching processshown in FIG. 2(D), there is provided a structure in which, in theamorphous semiconductor film, the film thickness in a region thatcontacts with the source region and the drain region is formed thickerthan the film thickness in a region between a region that contacts withthe source region and a region that contacts with the drain region, thatis, a channel etch type bottom gate structure.

[0049] Besides, the structure of the invention for realizing the aboveconstruction is a method of fabricating a semiconductor device,characterized by comprising:

[0050] a first step of forming a gate wiring line 102 by using a firstmask;

[0051] a second step of forming an insulating film 104 covering the gatewiring line;

[0052] a third step of forming a first amorphous semiconductor film 105on the insulating film;

[0053] a fourth step of forming a second amorphous semiconductor film106 containing an impurity element to give an n-type conductivity on thefirst amorphous semiconductor film;

[0054] a fifth step of forming a first conductive film 107 on the secondamorphous semiconductor film;

[0055] a sixth step of forming a wiring line 116 (a source wiring lineand an electrode) by selectively removing the insulating film 104, thefirst amorphous semiconductor film 105, the second amorphoussemiconductor film 106, and the first conductive film 107 by using asecond mask;

[0056] a seventh step of forming a second conductive film 118 being incontact with and overlapping with the wiring line 116 (the source wiringline and the electrode); and

[0057] an eighth step of forming a source region 123 and a drain region124 comprising the second amorphous semiconductor film, and a pixelelectrode 127 made of the second conductive film by selectively removinga part of the first amorphous semiconductor film 112, the secondamorphous semiconductor film 114, the first conductive film 116, and thesecond conductive film 118 by using a third mask.

[0058] Besides, in the above structure, it is characterized in thatformation is continuously made without being exposed to the air from thesecond step to the fifth step.

[0059] Besides, in the above respective structures, it is characterizedin that formation is continuously made in the same chamber from thesecond step to the fifth step.

[0060] Besides, in the above respective structures, the insulating filmmay be formed by a sputtering method or a plasma CVD method.

[0061] Besides, in the above respective structures, the first amorphoussemiconductor film may be formed by a sputtering method or a plasma CVDmethod.

[0062] Besides, in the above respective structures, the second amorphoussemiconductor film may be formed by a sputtering method or a plasma CVDmethod.

[0063] Besides, in the above respective structures, it is characterizedin that the second conductive film is a transparent conductive film or aconductive film having reflectivity.

[0064] [Embodiment Mode of the Invention]

[0065] The mode of carrying out the invention will be described below.

[0066]FIG. 1 is an example of a plan view of an active matrix substrateof the present invention, and here, for simplification, one pixelstructure among a plurality of pixels arranged in matrix form is shown.FIGS. 2 and 3 are views showing a fabricating process.

[0067] As shown in FIG. 1, this active matrix substrate includes aplurality of gate wiring lines arranged in parallel with each other, anda plurality of source wiring lines perpendicular to the respective gatewiring lines.

[0068] A pixel electrode 127 comprising a transparent conductive film isdisposed at a region surrounded by the gate wiring lines and the sourcewiring lines. Besides, a transparent conductive film 128 overlaps withthe source wiring line so as not to overlap with the pixel electrode127.

[0069] Further, a capacitance wiring line 103 is disposed below thepixel electrode 127, between adjacent two gate wiring lines, and inparallel with the gate wiring line 102. This capacitance wiring line 103is provided for every pixel, and forms a storage capacitor with aninsulating film 111 shown in FIG. 2(B) as a dielectric.

[0070] Besides, a TFT as a switching element is provided in the vicinityof an intersection of the gate wiring line 102 and the source wiringline 125. This TFT is a reversed stagger type (or bottom gate type) TFTincluding a channel formation region comprising a semiconductor filmhaving an amorphous structure (hereinafter referred to as an amorphoussemiconductor film).

[0071] Besides, in this TFT, a gate electrode (formed integrally withthe gate wiring line 102), a gate insulating film, an a-Si film, asource region and a drain region comprising an n⁺a-Si film, a sourceelectrode (formed integrally with the source wiring line 125), and anelectrode 126 (hereinafter also referred to as a drain electrode) aresequentially formed to be laminated on an insulating substrate.

[0072] Besides, the gate insulating film does not exist over the gatewiring line in a region where the gate wiring line does not overlap withthe a-Si film.

[0073] Thus, the pixel electrode 127 overlapping with the electrode 126is formed so as not to overlap with the gate wiring line.

[0074] Besides, at the intersection of the gate wiring line and thesource wiring line, the transparent conductive film at the end portionof the source wiring line is removed so as to prevent shorting. Besides,the end of an electrode 117 is removed so as to prevent shorting betweenthe capacitance wiring line and the pixel electrode.

[0075] Besides, under the source wiring line (including the sourceelectrode) and the drain electrode 126, the gate insulating film, thea-Si film, and the n⁺a-Si film are sequentially formed to be laminatedon the insulating substrate.

[0076] Besides, the a-Si film in a region between a region that contactswith the source region and a region that contacts with the drain region,is thin as compared with that in the other regions. The film is thinsince, when the n⁺a-Si film was separated by etching to form the sourceregion and the drain region, a part of the a-Si film was removed.Besides, by this etching, an end surface of the pixel electrode, an endsurface of the drain electrode, and an end surface of the drain regionare coincident with each other.

[0077] Besides, similarly, an end surface of the transparent conductivefilm covering the source electrode, an end surface of the source region,and an end surface of the source wiring line are coincident with eachother.

[0078] The present invention made of the foregoing structure will bedescribed in more detail with embodiments shown below.

[0079] [Embodiments]

[0080] [Embodiment 1]

[0081] An embodiment of the invention are explained using FIGS. 1 to 6and 9. The present embodiment shows a method of manufacturing a liquidcrystal display device, and a detailed explanation of a method offorming a TFT of a pixel portion on a substrate by a reversed staggertype TFT, and manufacturing a storage capacitor connected to the TFT, ismade in accordance with the processes used. Further, a manufacturingprocess for an input terminal section, formed in an edge portion of thesubstrate, and for electrically connecting to wirings of circuits formedon other substrates, is shown at the same time in the same figures.

[0082] In FIG. 2(A), a glass substrate, comprising such as bariumborosilicate glass or aluminum borosilicate glass, typically CorningCorp. #7059 or #1737, can be used as a substrate 100 havingtranslucency. In addition, a translucent substrate such as a quartzsubstrate or a plastic substrate can also be used.

[0083] Next, after forming a conductive layer on the entire surface ofthe substrate, a first photolithography process is performed, a resistmask is formed, unnecessary portions are removed by etching, and wiringsand electrodes (the gate wiring 102 including a gate electrode, acapacitor wiring 103 and a terminal 101) are formed. Etching isperformed at this time to form a tapered portion in at least an edgeportion of the gate electrode 102. A top view of this stage is shown inFIG. 4.

[0084] It is preferable to form the gate wiring 102 including the gateelectrode, the capacitor wiring 103, and the terminal 101 of theterminal portion from a low resistivity conductive material such asaluminum (Al) or the like, but simple Al has problems such as inferiorheat resistance and easy to be corroded, and therefore it is combinedwith a heat resistant conductive material. One element selected from thegroup consisting of titanium (Ti), tantalum (Ta), tungsten (W),molybdenum (Mo), chromium (Cr), Neodymium (Nd), or an alloy comprisingthe above elements, or an alloy film of a combination of the aboveelement, or a nitrated compound comprising the above element is formedas the heat resistant conductive material. Furthermore, forming incombination with a heat resistant conductive material such as Ti, Si,Cr, or Nd, it is preferable because of improved flatness. Further, onlysuch heat resistant conductive film may also be formed, for example, incombination with Mo and W.

[0085] In realizing the liquid crystal display device, it is preferableto form the gate electrode and the gate wiring by a combination of aheat resistant conductive material and a low resistivity conductivematerial. An appropriate combination in this case is explained.

[0086] Provided that the screen size is on the order of, or less than, 5inch diagonal type, a two layer structure of a lamination of aconductive layer (A) comprising a nitride compound of a heat resistantconductive material, and a conductive layer (B) comprising a heatresistant conductive material is used. The conductive layer (B) maycomprise an element selected from the group consisting of Al, Ta, Ti, W,Nd, and Cr, or from an alloy of the above elements, or from an alloyfilm of a combination of the above elements, and the conductive layer(A) comprises a film such as a tantalum nitride (TaN) film, a tungstennitride (WN) film, or a titanium nitride (TiN) film. For example, it ispreferable to use a double layer structure of a lamination of Cr as theconductive layer (A) and Al containing Nd as the conductive layer (B).The conductive layer (A) is given a thickness of 10 to 100 nm(preferably between 20 and 50 nm), and the conductive layer (B) is madewith a thickness of 200 to 400 nm (preferably between 250 and 350 nm).

[0087] On the other hand, in order to be applied to a large screen, itis preferable to use a three layer structure of a lamination of aconductive layer (A) comprising a heat resistant conductive material, aconductive layer (B) comprising a low resistivity conductive material,and a conductive layer (C) comprising a heat resistant conductivematerial. The conductive layer (B) comprising the low resistivityconductive material comprises a material comprising aluminum (Al), andin addition to pure Al, Al containing between 0.01 and 5 atomic % of anelement such as scandium (Sc), Ti, Nd, or silicon (Si), etc. is used.The conductive layer (C) is effective in preventing generation ofhillocks in the Al of the conductive layer (B). The conductive layer (A)is given a thickness of 10 to 100 nm (preferably between 20 and 50 nm),the conductive layer (B) has 200 to 400 nm thick (preferable between 250and 350 nm), and the conductive layer (C) is from 10 to 100 nm thick(preferably between 20 and 50 nm). In the present embodiment, theconductive layer (A) comprises a Ti film with a thickness of 50 nm, madeby sputtering with a Ti target, the conductive layer (B) comprises an Alfilm with a thickness of 200 nm, made by sputtering with an Al target,and the conductive layer (C) is a 50 nm thick Ti film, made bysputtering with a Ti target.

[0088] An insulating film 104 is formed next on the entire surface. Theinsulating film 104 is formed using sputtering, and has a film thicknessof 50 to 200 nm.

[0089] For example, a silicon nitride film is used as the insulatingfilm 104, and formed to a thickness of 150 nm. Of course, the gateinsulating film is not limited to this type of silicon nitride film, andanother insulating film such as a silicon oxide film, a siliconoxynitride film, or a tantalum oxide film may also be used, and the gateinsulating film may comprise a single layer or a lamination structurecomprising these materials. For example, a lamination structure having asilicon nitride film as a lower layer and a silicon oxide film as anupper layer may be used.

[0090] Next, an amorphous semiconductor film 105 is formed with athickness of 50 to 200 nm (preferably between 100 and 150 nm) on theinsulating film 104 over the entire surface by using a known method suchas plasma CVD or sputtering (not shown in the figure). Typically, anamorphous silicon (a-Si) film is formed with a thickness of 100 nm bysputtering using a silicon target. In addition, it is also possible toapply a microcrystalline semiconductor film, or a compound semiconductorfilm having an amorphous structure, such as an amorphous silicongermanium film.

[0091] An amorphous semiconductor film 106 containing an impurityelement imparting n-type is formed next with a thickness of 20 to 80 nmas a semiconductor film 106 which contains an impurity element impartingone conductivity type. The amorphous semiconductor film 106 containingan impurity element imparting n-type is formed on the entire surface bya known method such as plasma CVD or sputtering. Typically it isappropriate to form an n⁺a-Si:H film, and it is deposited by using asilicon target added with phosphorus (P). Alternatively, film depositionmay be performed by sputtering using a silicon target in an atmospherecontaining phosphorous. In addition, the amorphous semiconductor film106 containing an impurity element imparting n-type may also comprise ahydrogenated microcrystalline silicon film (μc-Si:H).

[0092] Next, a conductive metal film 107 is formed by sputtering orvacuum evaporation. Provided that ohmic contact with the n⁺a-Si film 106can be made, there are no particular limitation on the material of theconductive metal film 107, and an element selected from the groupconsisting of Al, Cr, Ta, and Ti, or an alloy comprising the aboveelements, and an alloy film of a combination of the above elements orthe like can be given. Note however that it is necessary to choose amaterial for the conductive metal film 107 which has a sufficientselective ratio with respect to the terminal and the gate wiring in thelater etching process. In the present embodiment, sputtering is used anda Cr film having 300 to 600 thickness is formed as the metal film 107.(FIG. 2(A)).

[0093] The insulating film 104, the amorphous semiconductor film 105,the semiconductor film 106 containing an impurity element which impartsone conductivity type, and the conductive metal film 107 are allmanufactured by a known method, and can be manufactured by plasma CVD orsputtering. The films are formed in succession by sputtering, andsuitably changing the target or the sputtering gas in the presentembodiment. The same reaction chamber, or a plurality of reactionchambers, in the sputtering apparatus is used at this time, and it ispreferable to laminate these films in succession without exposure to theatmosphere. By thus not exposing the films to the atmosphere, the mixingin of impurities can be prevented.

[0094] Next, a second photolithography process is performed, resistmasks 108 and 109 are formed, and by removing unnecessary portions byetching, insulating films 110 and 111, a wiring and an electrode (sourcewiring) are formed. Wet etching or dry etching is used as the etchingprocess at this time. The insulating film 104, the amorphoussemiconductor film 105, the semiconductor film 106 containing animpurity element imparting one conductivity type and the conductivemetal film 107 are etched in the second photolithograpy process, and aninsulating film 110, an amorphous semiconductor film 112, asemiconductor film containing an impurity element imparting oneconductivity type 114 and a conductive metal film 116 are formed in thepixel TFT portion. Accordingly the edge surface of the filmsapproximately coincide. Further in the capacitor portion an insulatingfilm 111, an amorphous semiconductor film 113, a semiconductor film 115containing an impurity element imparting one conductivity type and aconductive metal film 117 are formed. Similarly, the edge surface ofthese films coincide.

[0095] Further, in the above second photolithography process, the filmsare etched away leaving only the terminal 101 in the terminal portion.The insulating film on the gate wiring is also removed by leaving onlyintersecting portion with other wirings. Accordingly it is necessary toselect a material for the terminal 101 and gate wiring that hassufficient selective ratio with respect to that of the insulating film,and it is further necessary to select a material which has a sufficientselective ratio for the materials of the terminal with respect to thatof the conductive metal film. That is, it is necessary to choosedifferent materials for the terminal and the gate wiring from that ofthe conductive metal film. In the present embodiment, the metal film 107is etched by dry etching using a mixed gas of Cl₂ and O₂, and then thesemiconductor film 106 containing an impurity element imparting oneconductivity type, the amorphous semiconductor film 105 and theinsulating film 104 are selectively removed by changing the reaction gasto a mixed gas of CF₄ and O₂. (FIG. 2(B)).

[0096] Next, after removing the resist mask 108, a transparentconductive film 118 is deposited over the entire surface. (FIG. 2(C)) Atop view in this state is shown in FIG. 5. Note however, forsimplification, the transparent conductive film 118 deposited over theentire surface is not shown in FIG. 5.

[0097] The transparent conductive film 118 comprises a material such asindium oxide (In₂O₃) or indium oxide tin oxide alloy (In₂O₃—SnO₂,abbreviated as ITO) using a method such as sputtering or vacuumevaporation. The etching process for this type of material is performedusing a solution of hydrochloric acid type. However, a residue is easilygenerated, particularly in ITO etching, and therefore an indium oxidezinc oxide alloy (In₂O₃—ZnO) may be used in order to improve the etchingworkability. The indium oxide zinc oxide alloy has superior surfacesmoothing characteristics, and has superior thermal stability comparedto ITO, and therefore even if the electrode 116 comprises an Al film, acorrosion reaction can be prevented. Similarly, zinc oxide (ZnO) is alsoa suitable material, and in addition, in order to increase thetransmittivity of visible light and increase the conductivity, amaterial such as zinc oxide in which gallium (Ga) is added (ZnO:Ga) canbe used.

[0098] Resist masks 119, 120 and 121 are formed next by a thirdphotolithography process. Unnecessary portions are then removed byetching, forming an amorphous semiconductor film 122, a source region123, a drain region 124, the source electrode 125, the drain electrode126, and the pixel electrode 127. (FIG. 2(D)).

[0099] The third photolithography process patterns the transparentconductive film 118, and at the same time removes a part of theconductive metal film 116, the n⁺a-Si film 114 and the amorphoussemiconductor film 112 by etching, forming an opening. In the presentembodiment, the pixel electrode comprising ITO is selectively removedfirst by wet etching using a mixed solution of nitric acid andhydrochloric acid, or a ferric chloride solution, and after removing theconductive metal film 116 by wet etching, a part of the n⁺a-Si film 114and the amorphous semiconductor film 112 are etched by dry etching. Notethat wet etching and dry etching are used in the present embodiment, butthe operator may perform only dry etching by suitably selecting thereaction gas, and the operator may perform only wet etching by suitablyselecting the reaction solution.

[0100] Further, the lower portion of the opening reaches the amorphoussemiconductor film, and the amorphous semiconductor film 114 is formedhaving a concave portion. The conductive metal film 116 is separatedinto the source wiring 125 and the drain electrode 126 by the opening,and the n⁺a-Si:H film 114 is separated into the source region 123 andthe drain region 124. Furthermore, the transparent conductive film 128contacting the source electrode 125 covers the source wiring, and duringsubsequent manufacturing processes, especially during a rubbing process,fulfills a role of preventing static electricity from developing. Anexample of forming the transparent conductive film 128 on the sourcewiring is shown in the present embodiment, but the transparentconductive film 128 may also be removed during the above etching of theITO film. In addition, a circuit for protecting from static electricitymay be formed by utilizing the above ITO film, in the etching of the ITOfilm.

[0101] Further, though not shown in the figure, it is necessary that thegate wiring have selective ratio with the amorphous semiconductor filmand the metal film 116 since the transparent conductive film formed onthe gate wiring is selectively removed by the above thirdphotolithography process. Note however the transparent conductive filmis partially left in the gate wiring terminal portion.

[0102] Resist masks 119 to 121 are next removed. The cross sectionalview of this state is shown in FIG. 3(A). Note that FIG. 1 is a top viewof one pixel and the cross sections along the A-A′ line and the B-B′line correspond to FIG. 3(A) respectively.

[0103] Furthermore, FIG. 9(A) shows top views of a gate wiring terminalportion 501 and a source wiring terminal portion 502 in this state. Notethat the same symbols are used for area corresponding to those of FIG. 1to FIG. 3. Further, FIG. 9(B) corresponds to a cross-sectional viewtaken along the lines E-E′ and F-F′ in FIG. 9(A). Reference numeral 503in FIG. 9(A) comprising a transparent conductive film denotes aconnecting electrode which functions as an input terminal. In addition,in FIG. 9(B) reference numeral 504 denotes an insulating film (extendedfrom 110), reference numeral 505 denotes an amorphous semiconductor film(extended from 122), and reference numeral 506 denotes an n⁺a-Si film(extended from 123).

[0104] Note that a storage capacitor is formed in the capacitor portionbetween the capacitor wiring 103 and the metal film 117 (or n⁺a-Si film115 or semiconductor film) with the insulating film 111 as a dielectric.

[0105] By thus using three photomasks and performing threephotolithography processes, the pixel TFT portion having the reversedstagger type n-channel type TFT 201 and the storage capacitor 202 can becompleted. By placing these in matrix form corresponding to each pixeland thus composing the pixel portion, one substrate can be made in orderto manufacture an active matrix liquid crystal display device. Forconvenience, this type of substrate is referred to as an active matrixsubstrate throughout this specification.

[0106] An alignment film 130 is selectively formed next in only thepixel portion of the active matrix substrate. Screen printing may beused as a method of selectively forming the alignment film 130, and amethod of removal in which a resist mask is formed using a shadow maskafter application of the alignment film may also be used. Normally, apolyimide resin is often used in the alignment film of the liquidcrystal display element.

[0107] Next, a rubbing process is then performed on the alignment film130, orienting the liquid crystal elements so as to possess a certainfixed pre-tilt angle.

[0108] The active matrix substrate, and an opposing substrate 133 onwhich an opposing electrode 132, and an alignment film 131 are formedare next joined together by a sealant while maintaining a gap betweenthe substrates using spacers, after which a liquid crystal material 134is injected into the space between the active matrix substrate and theopposing substrate. A known material may be applied for the liquidcrystal material 134, and a TN liquid crystal is typically used. Afterinjecting the liquid crystal material, the injecting entrance is sealedby a resin material.

[0109] Next, a flexible printed circuit (FPC) is connected to theterminal 101 of the terminal portion. The FPC comprises a copper wiring137 on an organic resin film 138 such as polyimide, and is connected tothe input terminal 129 comprising a transparent conductive film(corresponding to reference numeral 503 of FIG. 9) by an anisotropicconductive adhesive. The anisotropic conductive adhesive comprises anadhesive 135 and particles 136, with a diameter of several tens toseveral hundred of μm and having a conductive surface plated by amaterial such as gold, which are mixed therein. The particles 136 forman electrical connection in this portion by connecting the inputterminal 129 and the copper wiring 137. In addition, in order toincrease the mechanical strength of this region, a resin layer 139 isformed. (FIG. 3(B)).

[0110]FIG. 6 is a diagram explaining the placement of the pixel portionand the terminal portion of the active matrix substrate. A pixel portion211 is formed on a substrate 210, gate wirings 208 and source wirings207 are formed intersecting on the pixel portion, and the n-channel TFT201 connected to this is formed corresponding to each pixel. The pixelelectrode 127 and a storage capacitor 202 are connected to the drainside of the n-channel TFT 201, and the other terminal of the storagecapacitor 202 is connected to a capacitor wiring 209. The structure ofthe n-channel TFT 201 and the storage capacitor 202 is the same as thatof the n-channel TFT 201 and the storage capacitor 202 shown by FIG.3(A).

[0111] An input terminal portion 205 for inputting a scanning signal isformed in one edge portion of the substrate, and is connected to a gatewiring 208 by a connection wiring 206. Further, an input terminalportion 203 for inputting an image signal is formed in the other edgeportion, and is connected to a source wiring 207 by a connection wiring204. A plurality of the gate wiring 208, the source wiring 207, and thecapacitor wiring 209 are formed in accordance with the pixel density.The number of the wirings is as stated above. Furthermore, an inputterminal portion 212 for inputting an image signal and a connectionwiring 213 may be formed, and may be connected to the source wiringalternately with the input terminal portion 203. An arbitrary number ofthe input terminal portions 203, 205, and 212 are formed, which may besuitably determined by the operator.

[0112] [Embodiment 2]

[0113]FIG. 7 is an example of a method of mounting a liquid crystaldisplay device. The liquid crystal display device has an input terminalportion 302 formed in an edge portion of a substrate 301 on which TFTsare formed, and as shown by embodiment 1, this is formed by a terminal303 comprising the same material as the gate wiring. An opposingsubstrate 304 is joined to the substrate 301 by a sealant 305encapsulating spacers 306, and in addition, polarizing plates 307 and308 are formed. This is then fixed to a casing 321 by spacers 322.

[0114] Note that the TFT obtained in Embodiment 1 having an active layerformed by an amorphous semiconductor film has a low electric fieldeffect mobility, and only approximately 1 cm² Vsec is obtained.Therefore, a driver circuit for performing image display is formed by aLSI chip, and mounted by a TAB (tape automated bonding) method or by aCOG (chip on glass) method. In the present embodiment, an example isshown of forming the driver circuit in a LSI chip 313, and mounting byusing the TAB method. A flexible printed circuit (FPC) is used, and theFPC is formed by a copper wiring 310 on an organic resin film 309, suchas polyimide, and is connected to the input terminal 302 by ananisotropic conductive adhesive. The input terminal is a transparentconductive film formed on and contacting the wiring 303. The anisotropicconductive adhesive is structured by an adhesive 311 and particles 312,with a diameter of several tens to several hundred of μm and having aconductive surface plated by a material such as gold, which are mixedtherein. The particles 312 form an electrical connection in this portionby connecting the input terminal 302 and the copper wiring 310. Inaddition, in order to increase the mechanical strength of this region, aresin layer 318 is formed.

[0115] The LSI chip 313 is connected to the copper wiring 310 by a bump314, and is sealed by a resin material 315. The copper wiring 310 isthen connected to a printed substrate 317 on which other circuits suchas a signal processing circuit, an amplifying circuit, and a powersupply circuit are formed, through a connecting terminal 316. A lightsource 319 and a light conductor 320 are formed on the opposingsubstrate 304 and used as a back light in the transmitting liquidcrystal display device.

[0116] [Embodiment 3]

[0117] In the present embodiment, an example of forming a protectingfilm is shown in FIG. 6. Note that the present embodiment is identicalto Embodiment 1 till the state of FIG. 2(D), and therefore only pointsof difference are explained. Further, the same symbols are used forlocations corresponding to those in FIG. 2(D).

[0118] After first forming through the state of FIG. 2(D) in accordancewith Embodiment 1, a thin inorganic insulating film is formed on theentire surface. An inorganic insulating film formed as the thininorganic insulating film using a silicon oxide film, a silicon nitridefilm, a silicon oxynitride film, or a tantalum oxide film, and a singlelayer or a lamination structure comprising these materials may beformed.

[0119] A forth photolithography process is performed next, forming aresist mask, and unnecessary portions are removed by etching, forming aninsulating film 402 in the pixel TFT portion, and an inorganicinsulating film 401 in the terminal portion. These inorganic insulatingfilms 401 and 402 function as passivation films. Further, the thininorganic insulating film 401 is removed in the terminal portion by thefourth photolithography process, exposing the terminal 101 of theterminal portion.

[0120] The reversed stagger type n-channel type TFT and the storagecapacitor, protected by the inorganic insulating film, can thus becompleted in the present embodiment by performing the photolithographyprocess using four photomasks four times in total. Thus the pixelportion is structured by arranging these into a matrix statecorresponding to each pixel, and one substrate for manufacturing theactive matrix liquid crystal display device can be made.

[0121] Note that it is possible to freely combine the constitution ofthe present embodiment with that of Embodiment 1 or Embodiment 2.

[0122] [Embodiment 4]

[0123] Although Embodiment 1 show an example of laminating an insulatingfilm, an amorphous semiconductor film, an amorphous semiconductor filmcontaining an impurity element which imparts n-type conductivity, and ametal film by sputtering, but the present embodiment shows an example ofusing plasma CVD to form the films.

[0124] The insulating film, the amorphous semiconductor film, and theamorphous semiconductor film containing an impurity element whichimparts n-type conductivity are formed by plasma CVD in the presentembodiment.

[0125] In the present embodiment, a silicon oxynitride film is used asthe insulating film and formed with a thickness of 150 nm by plasma CVD.Plasma CVD may be performed at this point with a power supply frequencyof 13 to 70 MHz, preferably between 27 and 60 MHz. By using a powersupply frequency of 27 to 60 MHz, a dense insulating film can be formed,and the voltage resistance can be increased as a gate insulating film.Further, a silicon oxynitride film manufactured by adding O₂ to SiH₄ andN₂O has a reduction in fixed electric charge density in the film, andtherefore is a material which is preferable for this use. Of course, thegate insulating film is not limited to this type of silicon oxynitridefilm, and a single layer or a lamination structure using otherinsulating films such as s silicon oxide film, a silicon nitride film,or a tantalum oxide film may be formed. Further, a lamination structureof a silicon nitride film in a lower layer, and a silicon oxide film inan upper layer may be used.

[0126] For example, when using a silicon oxide film, it can be formed byplasma CVD using a mixture of tetraethyl orthosilicate (TEOS) and O₂,with the reaction pressure set to 40 Pa, a substrate temperature of 250to 350° C., and discharge at a high frequency (13.56 MHz) power densityof 0.5 to 0.8 W/cm². Good characteristics as the gate insulating filmcan be obtained for the silicon oxide film thus formed by a subsequentthermal anneal at 300 to 400° C.

[0127] Typically, a hydrogenated amorphous silicon (a-Si:H) film isformed with a thickness of 100 nm by plasma CVD as the amorphoussemiconductor film. At this point, plasma CVD may be performed with apower supply frequency of 13 to 70 MHz, preferably between 27 and 60MHz, in the plasma CVD apparatus. By using a power frequency of 27 to 60MHz, it becomes possible to increase the film deposition speed, and thedeposited film is preferable because it becomes an a-Si film having alow defect density. In addition, it is also possible to apply amicrocrystalline semiconductor film and a compound semiconductor filmhaving an amorphous structure, such as an amorphous silicon germaniumfilm, as the amorphous semiconductor film.

[0128] Further, if 100 to 100 k Hz pulse modulation discharge isperformed in the plasma CVD film deposition of the insulating film andthe amorphous semiconductor film, then particle generation due to theplasma CVD gas phase reaction can be prevented, and pinhole generationin the formed film can also be prevented, and therefore is preferable.

[0129] Further, in the present embodiment, an amorphous semiconductorfilm containing an impurity element which imparts n-type conductivity isformed with a thickness of 20 to 80 nm as a semiconductor filmcontaining a single conductivity type impurity element. For example, ana-Si:H film having n-type may be formed, and in order to do so,phosphine (PH₃) is added at a 0.1 to 5% concentration to silane (SiH₄).Alternatively, a hydrogenated microcrystalline silicon film (μc-Si:H)may also be used as a substitute for the amorphous semiconductor film106, containing an impurity element which imparts n-type conductivity.

[0130] These films can be formed in succession by appropriately changingthe reaction gas. Further, these films can be laminated successivelywithout exposure to the atmosphere at this time by using the samereaction chamber or a plurality of reaction chambers in the plasma CVDapparatus. By thus depositing successively these films without exposingthe films to the atmosphere, the mixing in of impurities into the firstamorphous semiconductor film can be prevented.

[0131] Note that it is possible to combine the present embodiment withEmbodiment 2.

[0132] [Embodiment 5]

[0133] Examples are shown in Embodiment 1 and Embodiment 4 of laminatingan insulating film, an amorphous semiconductor film, an n⁺a-Si film, anda metal film, in order and in succession. An example of an apparatushaving a plurality of chambers, and used for cases of performing thistype of successive film deposition is shown in FIG. 10.

[0134] An outline of an apparatus (successive film deposition system),shown by the present embodiment, is shown in FIG. 10 as seen from above.Reference numerals 10 to 15 in FIG. 10 denote chambers having airtightcharacteristics. A vacuum evacuation pump and an inert gas introductionsystem are arranged in each of the chambers.

[0135] The chambers denoted by reference numerals 10 and 15 areload-lock chambers for bringing sample (processing substrate) 30 intothe system. The chamber denoted by reference numeral 11 is a firstchamber for deposition of the insulating film 104. The chamber denotedby reference numeral 12 is a second chamber for deposition of theamorphous semiconductor film 105. The chamber denoted by referencenumeral 13 is a third chamber for deposition of the amorphoussemiconductor film 106 which imparts n-type conductivity. The chamberdenoted by reference numeral 14 is a fourth chamber for deposition ofthe metal film 107. Further, reference numeral 20 denotes a commonchamber for the sample, arranged in common with respect to each chamber.

[0136] An example of operation is shown below.

[0137] After pulling an initial high vacuum state in all of the chambersat first, a purge state (normal pressure) is made by using an inert gas,nitrogen here. Furthermore, all gate valves 22 to 27 are closed.

[0138] First, a cassette 28 loaded with a multiple number of processingsubstrate is placed into the load-lock chamber 10. After the cassette isplaced inside, a door of the load-lock chamber (not shown in the figure)is closed. In this state, the gate valve 22 is opened and one of theprocessing substrate 30 is removed from the cassette, and is taken outto the common chamber 20 by a robot arm 21. Position alignment isperformed in the common chamber at this time. Note that a substrate onwhich the wirings 101, 102, and 103 are formed, in accordance withEmbodiment 1, is used for the substrate 30.

[0139] The gate valve 22 is then closed, and a gate valve 23 is openednext. The processing substrate 30 is then moved into the first chamber11. Film deposition processing is performed within the first chamber ata temperature of 150 to 300° C. and the insulating film 104 is obtained.Note that a film such as a silicon nitride film, a silicon oxide film, asilicon oxynitride film, or a lamination film of these films, can beused as the insulating film. A single layer silicon nitride film isemployed in the present embodiment, but a two-layer, three-layer, orhigher layer lamination structure film may also be used. Note that achamber capable of plasma CVD is used here, but a chamber which iscapable of sputtering by utilizing a target may also be used.

[0140] After completing the deposition of the insulating film, theprocessing substrate is pulled out into the common chamber by the robotarm, and is then transported to the second chamber 12. Film depositionis performed within the second chamber at a temperature of 150 to 300°C., similar to that of the first chamber, and the amorphoussemiconductor film 105 is obtained by plasma CVD. Note that a film suchas a microcrystalline semiconductor film, an amorphous germanium film,an amorphous silicon germanium film, or a lamination film of thesefilms, etc., can be used as the amorphous semiconductor film. Further, aheat treatment process for reducing the concentration of hydrogen may beomitted with a formation temperature of 350 to 500° C. for the amorphoussemiconductor film. Note that a chamber capable of plasma CVD is usedhere, but a chamber which is capable of sputtering by use of a targetmay also be used.

[0141] After completing deposition of the amorphous semiconductor film,the processing substrate is pulled out into the common chamber and thentransported to the third chamber 13. Film deposition process isperformed within the third chamber at a temperature of 150 to 300° C.,similar to that of the second chamber, and the amorphous semiconductorfilm 106, containing an impurity element which imparts n-typeconductivity (P or As), is obtained by plasma CVD. Note that a chambercapable of plasma CVD is used here, but a chamber which is capable ofsputtering by use of a target may also be used.

[0142] After completing deposition of the amorphous semiconductor filmcontaining an impurity element which imparts n-type conductivity, theprocessing substrate is pulled out into the common chamber, and then istransported to the fourth chamber 14. The metal film 107 is obtainedwithin the fourth chamber by sputtering using a metallic target.

[0143] The processed substrate, on which four layers have thus beenformed in succession, is then transported to the load-lock chamber 15 bythe robot arm, and is contained in a cassette 29.

[0144] Note that the apparatus shown in FIG. 10 is only one example.Further, it is possible to freely combine the present embodiment withany one of Embodiments 1 to 4.

[0145] [Embodiment 6]

[0146] In Embodiment 5, an example of successive lamination using aplurality of chambers is shown, but in the present embodiment, a methodof successive lamination within one chamber maintained at high vacuumusing the apparatus shown in FIG. 11 is employed.

[0147] The apparatus system shown in FIG. 11 is used in the presentembodiment. In Fig. 11, reference numeral 40 denotes a processingsubstrate, reference numeral 50 denotes a common chamber, 44 and 46denote load-lock chambers, 45 denotes a chamber, and reference numerals42 and 43 denote cassettes. In order to prevent contamination developingduring transport of the substrate, lamination is performed in the samechamber in the present embodiment.

[0148] It is possible to freely combine the present embodiment with anyone of Embodiments 1 to 4.

[0149] Note that, when it is applied to Embodiment 1, a plurality oftargets are prepared in the chamber 45, and then the insulating film104, the amorphous semiconductor film 105, the amorphous semiconductorfilm 106 containing an impurity element which imparts n-typeconductivity, and the metal film 107 may be laminated by changing thereaction gas in order.

[0150] Further, when applied to Embodiment 3, the insulating film 104,the amorphous semiconductor film 105, and the amorphous semiconductorfilm 106 containing an impurity element which imparts n-typeconductivity, may be laminated by changing the reaction gas in order.

[0151] [Embodiment 7]

[0152] In Embodiment 1, an example of forming the n⁺a-Si film by usingsputtering is shown, but in the present embodiment, an example offorming it by using plasma CVD is shown. Note that, except for themethod of forming the n⁺a-Si film, the present embodiment is identicalto Embodiment 1, and therefore only differing points are stated below.

[0153] If phosphine (PH₃) is added at a concentration of 0.1 to 5% withrespect to silane (SiH₄) as a reaction gas using plasma CVD, then then⁺a-Si film can be obtained.

[0154] [Embodiment 8]

[0155] In Embodiment 7, an example of forming the n⁺a-Si film by usingplasma CVD is shown, and in the present embodiment, an example of usinga microcrystalline semiconductor film containing an impurity elementwhich imparts n-type conductivity y is shown.

[0156] By setting the deposition temperature from 80 to 300° C.,preferably between 140 and 200° C., taking a gas mixture of silanediluted by hydrogen (SiH₄:H₂=1:10 to 100) and phosphine (PH₃) as thereaction gas, setting the gas pressure from 0.1 to 10 Torr, and settingthe discharge power from 10 to 300 mW/cm², a microcrystalline siliconfilm can be obtained. Further phosphorous may be added by plasma dopingafter film deposition of this microcrystalline silicon film.

[0157] [Embodiment 9]

[0158]FIG. 12 is a diagram which schematically shows a state ofconstructing an liquid crystal display device by using the COG method. Apixel region 803, an external input-output terminal 804, and aconnection wiring 805 are formed on a first substrate. Regionssurrounded by dotted lines denote a region 801 for attaching a scanningline side IC chip, and a region 802 for attaching a data line side ICchip. An opposing electrode 809 is formed on a second substrate 808, andthis is joined to the first substrate 800 by using a sealing material810. A liquid crystal layer 811 is formed inside the sealing material810 by injecting a liquid crystal. The first substrate and the secondsubstrate are joined with a predetermined gap, and this is set from 3 to8μm for a nematic liquid crystal, and from 1 to 4 μm for a smecticliquid crystal.

[0159] IC chips 806 and 807 have circuit structures which differ betweenthe data line side and the scanning line side. The IC chips are mountedon the first substrate. An FPC (flexible printed circuit) 812 isattached to the external input-output terminal 804 in order to inputpower supply and control signals from the outside. In order to increasethe adhesion strength of the FPC 812, a reinforcement 813 may be formed.The liquid crystal display device can thus be completed. If anelectrical inspection is performed before mounting the IC chips on thefirst substrate, then the final process yield of the liquid crystaldisplay device can be improved, and the reliability can be increased.

[0160] Further, a method such as a method of connection using ananisotropic conductive material or a wire bonding method, can beemployed as the method of mounting the IC chips on the first substrate.FIG. 13 shows examples of such. FIG. 13(A) shows an example in which anIC chip 908 is mounted on a first substrate 901 using an anisotropicconductive material. A pixel region 902, a lead wire 906, a connectionwiring and an input-output terminal 907 are formed on the firstsubstrate 901. A second substrate is bonded to the first substrate 901by using a sealing material 904, and a liquid crystal layer 905 isformed therebetween.

[0161] Further, an FPC 912 is bonded to one edge of the connectionwiring and the input-output terminal 907 by using an anisotropicconductive material. The anisotropic conductive material comprises aresin 915 and conductive particles 914 having a diameter of several tensto several hundred of μm and plated by a material such as Au, and theconnection wiring 913 formed with the FPC 912, and the connection wiringand the input-output terminal 907 are electrically connected by theconductive particles 914. The IC chip 908 is also similarly bonded tothe first substrate by an anisotropic conductive material. Aninput-output terminal 909 provided with the IC chip 908 and the leadwire 906 or a connection wiring and the input-output terminal 907 areelectrically connected by conductive particles 910 mixed into a resin911.

[0162] Furthermore, as shown by FIG. 13(B), the IC chip may be fixed tothe first substrate by an adhesive material 916, and an input-outputterminal of a stick driver and a lead wire or a connection wiring may beconnected by an Au wire 917. Then, this is all sealed by a resin 918.

[0163] The method of mounting the 1C chip is not limited to the methodbased on FIGS. 12 and 13, and it is also possible to use a known methodnot explained here, such as a COG method, a wire bonding method or a TABmethod.

[0164] It is possible to freely combine the present embodiment withEmbodiment 1.

[0165] [Embodiment 10]

[0166] In Embodiment 1, a method of manufacturing an active matrixsubstrate corresponding to a transmission type liquid crystal displaydevice is shown, but in the present embodiment, an example ofapplication to a reflection type liquid crystal display device is shown,using FIG. 14.

[0167] First, in the same way as the embodiment 1, steps up to the stepshown in FIG. 2(B) are carried out. Then, an interlayer insulating filmcomprising an organic resin film is formed. Next, a roughening processof the interlayer insulating film is carried out to form an interlayerinsulating film 601 having a roughened portion. As the rougheningprocess, a method of applying an organic resin film containing fibers orspacers may be used, a method of formation by partially etching anorganic resin film by using a mask may be used, or a method of formationby heating to perform reflow after a photosensitive resin is etched byusing a mask to make a cylindrical shape, may be used.

[0168] Next, contact holes reaching a source wiring line and a drainelectrode are formed in the interlayer insulating film 601 by a thirdphotolithography step. Besides, in order to form a storage capacitor bythe same step, at the same time that the contact hole reaching theelectrode is formed, the interlayer insulating film on a terminalportion is removed.

[0169] Next, a conductive film (Al, Ag, etc.) having reflectivity isformed.

[0170] Then, a resist mask pattern is formed by a fourthphotolithography step, and a pixel electrode 602 made of the conductivefilm having the reflectivity is formed by etching. The pixel electrode602 formed in this way has a roughened portion, can disperse light, andcan prevent formation of a mirror surface. At the same time, a leadwiring line 603 reaching a source electrode is formed.

[0171] Since subsequent steps are the same as the embodiment 1, they areomitted. In this way, an active matrix substrate corresponding to areflection type liquid crystal display device can be fabricated throughfour photolithography steps using four photomasks.

[0172] Besides, the present embodiment can be combined with theembodiment 2 or the embodiment 3.

[0173] [Embodiment 11]

[0174] CMOS circuits and pixel portion formed by implementing thepresent invention can be used in various electro-optical devices (suchas an active matrix liquid crystal display device and an active matrixEC display device). Namely, the present invention can be implemented inall electronic appliance in which these electro-optical devices arebuilt into a display portion.

[0175] The following can be given as such electronic appliance: a videocamera, a digital camera, a projector (rear type or front type), ahead-mounted display (goggle type display), a car navigation system, acar stereo, a personal computer, and a portable information terminal(such as a mobile computer, a portable telephone or an electronic book).Examples of these are shown in FIGS. 15, 16 and 17.

[0176]FIG. 15(A) is a personal computer, and it includes a main body2001, an image input portion 2002, a display portion 2003, and akeyboard 2004, etc. The present invention can be applied to the imageinput portion 2002, the display portion 2003 or other signal drivercircuits.

[0177]FIG. 15(B) is a video camera, and it includes a main body 2101, adisplay portion 2102, an audio input portion 2103, operation switches2104, a battery 2105, and an image receiving portion 2106, etc. Thepresent invention can be applied to the display portion 2102 or othersignal driver circuits.

[0178]FIG. 15(C) is a mobile computer, and it includes a main body 2201,a camera portion 2202, an image receiving portion 2203, operationswitches 2204, and a display portion 2205, etc. The present inventioncan be applied to the display portion 2205 or other signal drivercircuits.

[0179]FIG. 15(D) is a goggle type display, and it includes a main body2301, a display portion 2302, an arm portion 2303, etc. The presentinvention can be applied to the display portion 2302 or other signaldriver circuits.

[0180]FIG. 15(E) is a player that uses a recording medium on which aprogram is recorded (hereafter referred to as a recording medium), andthe player includes a main body 2401, a display portion 2402, a speakerportion 2403, a recording medium 2404, and operation switches 2405, etc.Note that this player uses a recording medium such as a DVD (digitalversatile disk) or a CD, and the appreciation of music, the appreciationof film, game playing and the Internet can be performed. The presentinvention can be applied to the display portion 2402 or other signaldriver circuits.

[0181]FIG. 15(F) is a digital camera, and it includes a main body 2501,a display portion 2502, an eyepiece portion 2503, operation switches2504, and an image receiving portion (not shown in the figure), etc. Thepresent invention can be applied to the display portion 2502 or othersignal driver circuits.

[0182]FIG. 16(A) is a front projector, and it includes a projectionsystem 2601, a screen 2602, etc. The present invention can be applied toa liquid crystal display device 2808 which constitutes a part of theprojection system 2601, or other signal driver circuits.

[0183]FIG. 16(B) is a rear projector, and it includes a main body 2701,a projection system 2702, a mirror 2703, a screen 2704, etc. The presentinvention can be applied to a liquid crystal display device 2808 whichconstitutes a part of the projection system 2702 or other signal drivercircuits.

[0184] Note that FIG. 16(C) is a diagram showing an example of thestructure of projection systems 2601 and 2702 of FIGS. 16(A) and 16(B).The projection systems 2601 and 2702 comprise an optical light sourcesystem 2801, mirrors 2802 and 2804 to 2806, a dichroic mirror 2803, aprism 2807, a liquid crystal display device 2808, phase differentiatingplate 2809 and a projection optical system 2810. The projection opticalsystem 2810 comprises an optical system including a projection lens. Thepresent Embodiment showed a three plate type, but it is not limited tothis structure, and it may be for instance a single plate type. Further,the operator may appropriately dispose an optical system such as anoptical lens, a film having light polarizing function, a film foradjusting phase difference and an IR film, in the optical path shown byan arrow in the FIG. 16(C).

[0185]FIG. 16(D) is a diagram showing an example of the structure of theoptical light source system 2801 of FIG. 16(C). In the presentembodiment the optical light source system 2801 comprises a reflector2811, a light source 2812, lens arrays 2813 and 2814, light polarizingconversion element 2815 and a condenser lens 2816. Note that the opticallight source system shown in FIG. 16(D) is merely an example and is notspecifically limited. For example, the operator may appropriatelydispose an optical system such as an optical lens, a film having lightpolarizing function, a film for adjusting phase difference and an IRfilm, etc., in the optical light source system.

[0186] Provided however, the projectors shown in FIG. 16 show a case ofusing transmission type electro-optical device and an applicationexample of reflection type electro-optical device is not shown in thefigures.

[0187]FIG. 17(A) is a portable telephone, and it includes a main body2901, an audio output portion 2902, an audio input portion 2903, adisplay portion 2904, operation switches 2905, and an antenna 2906, etc.The present invention can be applied to the audio output portion 2902,the audio input portion 2903, the display portion 2904 or other signaldriver circuits.

[0188]FIG. 17(B) is a portable book (electronic book), and it includes amain body 3001, display portions 3002 and 3003, a recording medium 3004,operation switches 3005, and an antenna 3006, etc. The present inventioncan be applied to the display portions 3002 and 3003 or other signaldriver circuits.

[0189]FIG. 17(C) is a display, and it includes a main body 3101, asupport stand 3102, and a display portion 3103, etc. The presentinvention can be applied to the display portion 3103. The display of thepresent invention is advantageous for a large size screen in particular,and is advantageous for a display equal to or greater than 10 inches(especially equal to or greater than 30 inches) in diagonal.

[0190] The applicable range of the present invention is thus extremelywide, and it is possible to apply the present invention to electronicappliance in all fields. Further, the electronic appliance of thepresent embodiment can be realized by using a constitution of anycombination of embodiments 1 to 10.

[0191] [Effects of the Invention]

[0192] With the present invention, a liquid crystal display deviceprepared with a pixel TFT portion, having a reversed stagger typen-channel TFT, and a storage capacitor can be realized through threephotolithography steps using three photomasks.

[0193] Further, when forming a protecting film, a liquid crystal displaydevice prepared with a pixel TFT portion, having a reversed stagger typen-channel TFT protected by an inorganic insulating film, and a storagecapacitor can be realized through four photolithography steps using fourphotomasks.

BRIEF DESCRIPTION OF THE DRAWINGS

[0194]FIG. 1 A view showing a top view of the present invention.

[0195]FIG. 2 A sectional view showing a fabricating process of anAM-LCD.

[0196]FIG. 3 A sectional view showing the fabricating process of theAM-LCD.

[0197]FIG. 4 A top view showing a fabricating process of an AM-LCD.

[0198]FIG. 5 A top view showing the fabricating process of the AM-LCD.

[0199]FIG. 6 A top view for explaining the arrangement of a pixelportion and an input terminal portion of a liquid crystal displaydevice.

[0200]FIG. 7 A sectional view showing a mounting structure of a liquidcrystal display device.

[0201]FIG. 8 A sectional view showing a fabricating process of anAM-LCD.

[0202]FIG. 9 A top view and a sectional view of an input terminalportion.

[0203]FIG. 10 A top view of a fabricating apparatus.

[0204]FIG. 11 A top view of a fabricating apparatus.

[0205]FIG. 12 A view showing the mounting of a liquid crystal displaydevice.

[0206]FIG. 13 A sectional view showing a mounting structure of a liquidcrystal display device.

[0207]FIG. 14 A structural sectional view of an active matrix substrate.

[0208]FIG. 15 A view showing an example of electronic equipment.

[0209]FIG. 16 A view showing an example of electronic equipment.

[0210]FIG. 17 A view showing an example of electronic equipment.

1. A semiconductor device having a gate wiring, a source wiring, and apixel electrode, comprising: a gate wiring formed on an insulatingsurface; an insulating film formed on said gate wiring; an amorphoussemiconductor film formed on said insulating film; a source region and adrain region formed on said amorphous semiconductor film; a sourcewiring or an electrode formed on said source region or said drainregion; and a pixel electrode formed on said electrode; characterized inthat: one end surface of said drain region or said source regionreversed corresponds with an end surface of said insulating film, an endsurface of said amorphous semiconductor film and an end surface of saidelectrode.
 2. A semiconductor device having a gate wiring, a sourcewiring, and a pixel electrode, comprising: a gate wiring formed on aninsulating surface; an insulating film formed on said gate wiring; anamorphous semiconductor film formed on said insulating film; a sourceregion and a drain region formed on said amorphous semiconductor film; asource wiring or an electrode formed on said source region or said drainregion; and a pixel electrode formed on said electrode; characterized inthat: one end surface of said drain region or said source regionreversed corresponds with an end surface of said insulating film, an endsurface of said amorphous semiconductor film and an end surface of saidelectrode; and the other end surface of said drain region or said sourceregion reversed corresponds with an end surface of said pixel electrodeand the other end surface of said electrode.
 3. The semiconductor deviceas claimed in any one of claims 1 and 2, characterized in that saidsource region and said drain region comprise an amorphous semiconductorfilm containing an impurity element which imparts n-type conductivity.4. The semiconductor device as claimed in any one of claims 1 to 3,characterized in that said insulating film, said amorphous semiconductorfilm, said source region, and said drain region are formed in successionwithout exposure to the atmosphere.
 5. The semiconductor device asclaimed in any one of claims 1 to 4, characterized in that saidinsulating film, said amorphous semiconductor film, said source region,or said drain region is formed by a sputtering method.
 6. Thesemiconductor device as claimed in any one of claims 1 to 5,characterized in that said insulating film, said amorphous semiconductorfilm, said source region, or said drain region is formed by a plasma CVDmethod.
 7. The semiconductor device as claimed in any one of claims 1 to6, characterized in that said gate wiring comprises a film of an elementselected from the group consisting of Al, Ti, Mo, W, Ta, Nd, and Cr,from an alloy film of said elements, or from a lamination film of saidelements.
 8. The semiconductor device as claimed in any one of claims 1to 7, characterized in that said source region and said drain region areformed by the same mask as said insulating film, said amorphoussemiconductor film and said electrode.
 9. The semiconductor device asclaimed in any one of claims 1 to 8, characterized in that said sourceregion and said drain region are formed by the same mask as said sourcewiring.
 10. The semiconductor device as claimed in any one of claims 1to 8, characterized in that said source region and said drain region areformed by the same mask as said source wiring and said pixel electrode.11. The semiconductor device as claimed in any one of claims 1 to 10,characterized in that in said amorphous semiconductor film, the filmthickness in a region that contacts with said source region and saiddrain region is formed thicker than the film thickness in a regionbetween the region that contacts with said source region and the regionthat contacts said drain region.
 12. A semiconductor device according toany one of claims 1 to 11, characterized in that the semiconductordevice is a transmission type liquid crystal display device in which thepixel electrode comprises a transparent conductive film.
 13. Asemiconductor device according to any one of claims 1 to 11,characterized in that the semiconductor device is a reflection typeliquid crystal display device in which the pixel electrode comprises afilm containing Al or Ag as its main ingredient or a laminated film ofthose.
 14. The semiconductor device as claimed in any one of claims 1 to13, characterized in that said semiconductor device is a personalcomputer, a video camera, a portable information terminal, a digitalcamera, a digital video disk player, or an electronic amusement device.15. A method of fabricating a semiconductor device, characterized bycomprising: a first step of forming a gate wiring line by using a firstmask; a second step of forming an insulating film covering the gatewiring line; a third step of forming a first amorphous semiconductorfilm on the insulating film; a fourth step of forming a second amorphoussemiconductor film containing an impurity element to give an n-typeconductivity on the first amorphous semiconductor film; a fifth step offorming a first conductive film on the second amorphous semiconductorfilm; a sixth step of forming a source wiring line and an electrode byselectively removing the insulating film, the first amorphoussemiconductor film, the second amorphous semiconductor film, and thefirst conductive film by using a second mask; a seventh step of forminga second conductive film being in contact with and overlapping with thesource wiring line and the electrode; and an eighth step of forming asource region and a drain region comprising the second amorphoussemiconductor film, and a pixel electrode made of the second conductivefilm by selectively removing a part of the first amorphous semiconductorfilm, the second amorphous semiconductor film, the first conductivefilm, and the second conductive film by using a third mask.
 16. Themethod of manufacturing a semiconductor device as claimed in any one ofclaim 15, characterized in that said second step to said fifth step areperformed in succession, without exposure to the atmosphere.
 17. Themethod of manufacturing a semiconductor device as claimed in any one ofclaims 15 to 16, characterized in that said insulating film is formed bya sputtering method.
 18. The method of manufacturing a semiconductordevice as claimed in any one of claims 15 to 17, characterized in thatsaid first amorphous semiconductor film is formed by a sputteringmethod.
 19. The method of manufacturing a semiconductor device asclaimed in any one of claims 15 to 18, characterized in that said secondamorphous semiconductor film is formed by a sputtering method.
 20. Themethod of manufacturing a semiconductor device as claimed in any one ofclaims 15 to 18, characterized in that said second step to said fifthstep are performed in succession within the same chamber.
 21. The methodof manufacturing a semiconductor device as claimed in any one of claim15, characterized in that said insulating film is formed by a plasma CVDmethod.
 22. The method of manufacturing a semiconductor device asclaimed in any one of claims 15 and 21, characterized in that said firstamorphous semiconductor film is formed by a plasma CVD method.
 23. Themethod of manufacturing a semiconductor device as claimed in claim 15,claim 21, or claim 22, characterized in that said second amorphoussemiconductor film is formed by a plasma CVD method.
 24. The method ofmanufacturing a semiconductor device as claimed in any one of claims 15to 23, characterized in that said second conductive film is atransparent conductive film.
 25. The method of manufacturing asemiconductor device as claimed in any one of claims 15 to 23,characterized in that said second conductive film is a conductive filmhaving reflective characteristics.